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The Future May Have to Wait for Next-Generation Memory

Innovative technologies are on the horizon, but it may be years before they enter the mainstream. By James E. Gaskin

WANT SOME EXCITING new memory technologies to try? You’ve got plenty to choose from.

How about Hybrid Memory Cubes (HMCs), for example, which are more than 15 times faster than current chips yet consume 70 percent less energy? Nano-RAM (NRAM) uses a matrix of carbon nanotubes to create denser chips than DRAM, and it’s nonvolatile as well, so stored information can be retrieved even after host devices are shut off. ReRAM (aka RRAM or Resistive RAM) is faster than DDR and also nonvolatile.

“Trouble is, there are these incredible geniuses in the back room who keep finding ways to make DRAM and NAND scale beyond anything that anyone ever dreamed of,” says Jim Handy, analyst at Objective Analysis, of Los Gatos, Calif. With so much innovation around existing memory architectures going on, it can take years for newer ones to gain traction in the market. “So these emerging memory technologies keep waiting, waiting, waiting for their opportunity to rise,” Handy says.

HMCs, which are designed to increase bandwidth and density by stacking memory within a single logic layer, is the perfect example. Intel and Micron lead the project with Samsung, ARM, Microsoft, HP, and others taking part. Despite that broad support, though, only a few high-end components and evaluation kits feature the new technology.

Why aren’t more HMC options on the shelf? “It takes billions and billions of dollars to get the yield curve up and the price curve down,” says Jim McGregor, principal analyst at TIRIAS Research. “Most of the memory vendors have to jump on board to make any new tech the new standard, and that hasn’t happened with HMC. In fact, the Intel-Micron partnership is broken, but they won’t license the technology to anyone else.”

Meanwhile, though engineers may claim that a new approach like Hybrid Memory Cubes will pack more and faster memory in a smaller space, DDR4 made that same improvement over DDR3, and DDR5 is set to leapfrog DDR4. System builders already understand how to use DDR memory and have multiple trustworthy suppliers for it. Who can blame them for sticking with vendors they know and products likely to be cost competitive for the next five to 10 years?

“The memory that races down the cost curve the fastest will stand the greatest chance of winning the bulk of the market.”


“Look at the history of flash,” adds McGregor. “Intel took two years longer than [it] thought to get it to the mass market. It was 10 years before flash was competitive against other memory, and 20 years before it was competitive with hard drives.” Will today’s system builders wait that long for an acceptable price per bit from the latest memory technologies?

“It’s a chicken-and-egg problem,” says Handy. “The unit volume is low because they cost more than standard memory. Trouble is, they will continue to cost more until their unit volume approaches that of the entrenched memory technologies.”

Furthermore, one big vendor pushing a new product line isn’t enough. Intel promoted RDRAM, for example, but the industry went for DDR instead anyway. “The history of memory is littered with great technologies that didn’t make it to market,” says McGregor.

Still, experts foresee some new memory technologies being employed in specific scenarios. For instance, HMC built on a single die, such as IBM’s offering, may offer enough space-saving advantages to justify the extra cost.

Markets could develop similarly for other new memory products, including NRAM, RRAM, ferroelectric RAM, magnetic RAM, oxygen displacement memory, and phase-change memory. Handy’s prediction is no surprise: “The memory that races down the cost curve the fastest will stand the greatest chance of winning the bulk of the market.”

McGregor agrees. “For system builders, it’s about cost and time to market,” he says. “To use new technology, builders must be knowledgeable about that new technology, but mostly they look at the price per bit.” Until those costs come down, those dreamy new memory technologies will remain firmly in dreamland.

Image: Micron

About the Author

James E. Gaskin's picture

JAMES E. GASKIN is a ChannelPro contributing editor and former reseller based in Dallas.

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